Sciweavers

733 search results - page 71 / 147
» Model Reuse through Hardware Design Patterns
Sort
View
TCSV
2002
119views more  TCSV 2002»
14 years 9 months ago
VLSI architecture design of MPEG-4 shape coding
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-...
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
15 years 2 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
FDL
2004
IEEE
15 years 1 months ago
A Functional Programming Framework of Heterogeneous Model of Computation for System Design
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shu...
IWSAPF
2000
15 years 1 months ago
Software Connectors and Refinement in Family Architectures
Product families promote reuse of software artifacts such as architectures, designs and implementations. Product family architectures are difficult to create due to the need to sup...
Alexander Egyed, Nikunj R. Mehta, Nenad Medvidovic
ASAP
2006
IEEE
97views Hardware» more  ASAP 2006»
15 years 3 months ago
Dynamic-SIMD for lens distortion compensation
An increasing computational demand is placed on the image processing capacity of current and future smart cameras. SIMD processor architectures provide an efficient solution becau...
Bart Mesman, Hamed Fatemi, Henk Corporaal, Twan Ba...