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ISCAS
2008
IEEE
170views Hardware» more  ISCAS 2008»
15 years 4 months ago
Integrated circuit implementation of a cortical neuron
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
Jayawan H. B. Wijekoon, Piotr Dudek
CCE
2007
14 years 11 months ago
A Web Services based Approach for System on a Chip Design Planning
: The concept of Virtual Organisation (VO) offers various solutions to management, collaboration and coordination issues important for distributed collaborating teams. Deployment o...
Maciej Witczynski, Edward Hrynkiewicz, Adam Pawlak
ENTCS
2010
85views more  ENTCS 2010»
14 years 10 months ago
Global Coordination Policies for Services
An important issue of the service oriented approach is the possibility to aggregate, through programmable coordination patterns, the activities involved by service interactions. T...
Vincenzo Ciancia, Gian Luigi Ferrari, Roberto Guan...
ASPDAC
2001
ACM
68views Hardware» more  ASPDAC 2001»
15 years 1 months ago
Reducing bus delay in submicron technology using coding
ct,. In this paper we study the delay associated with transmission of data through busses. Previous work in this area has presented models for delay assuming a distributed wire mqd...
Paul-Peter Sotiriadis, Anantha Chandrakasan
IESS
2007
Springer
92views Hardware» more  IESS 2007»
15 years 4 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer