Sciweavers

733 search results - page 78 / 147
» Model Reuse through Hardware Design Patterns
Sort
View
IEEEPACT
2007
IEEE
15 years 4 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 4 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
EPIA
2001
Springer
15 years 2 months ago
Modelling Agent Societies: Co-ordination Frameworks and Institutions
Organisations can be defined as a set of entities regulated by mechanisms of social order and created by more or less autonomous actors to achieve common goals. Multi-agent systems...
Virginia Dignum, Frank Dignum
EUROMICRO
2005
IEEE
15 years 3 months ago
QoSOnt: a QoS Ontology for Service-Centric Systems
This paper reports on the development of QoSOnt: an ontology for Quality of Service (QoS). Particular focus is given to its application in the field of service-centric systems. Qo...
Glen Dobson, Russell Lock, Ian Sommerville
INFOCOM
2003
IEEE
15 years 3 months ago
The Impact of Multihop Wireless Channel on TCP Throughput and Loss
— This paper studies TCP performance over multihop wireless networks that use the IEEE 802.11 protocol as the access method. Our analysis and simulations show that, given a speci...
Zhenghua Fu, Petros Zerfos, Haiyun Luo, Songwu Lu,...