Sciweavers

733 search results - page 88 / 147
» Model Reuse through Hardware Design Patterns
Sort
View
ICSE
2007
IEEE-ACM
15 years 10 months ago
Revel8or: Model Driven Capacity Planning Tool Suite
Designing complex multi-tier applications that must meet strict performance requirements is a challenging software engineering problem. Ideally, the application architect could de...
Liming Zhu, Yan Liu, Ngoc Bao Bui, Ian Gorton
MICRO
2002
IEEE
100views Hardware» more  MICRO 2002»
15 years 2 months ago
Microarchitectural exploration with Liberty
To find the best designs, architects must rapidly simulate many design alternatives and have confidence in the results. Unfortunately, the most prevalent simulator construction ...
Manish Vachharajani, Neil Vachharajani, David A. P...
ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
15 years 1 months ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi
SIMPRA
2008
131views more  SIMPRA 2008»
14 years 9 months ago
Distributed simulation of DEVS and Cell-DEVS models in CD++ using Web-Services
: DEVS is a Modeling and Simulation formalism that has been widely used to study the dynamics of discrete event systems. Cell-DEVS is a DEVS-based formalism that defines spatial mo...
Gabriel A. Wainer, Rami Madhoun, Khaldoon Al-Zoubi
DATE
2009
IEEE
129views Hardware» more  DATE 2009»
15 years 4 months ago
Energy minimization for real-time systems with non-convex and discrete operation modes
—We present an optimal methodology for dynamic voltage scheduling problem in the presence of realistic assumption such as leakage-power and intra-task overheads. Our contribution...
Foad Dabiri, Alireza Vahdatpour, Miodrag Potkonjak...