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» Model Reuse through Hardware Design Patterns
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ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
15 years 3 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
ECMDAFA
2006
Springer
136views Hardware» more  ECMDAFA 2006»
15 years 1 months ago
Finding a Path to Model Consistency
A core problem in Model Driven Engineering is model consistency achievement: all models must satisfy relationships constraining them. Active consistency techniques monitor and cont...
Gregory de Fombelle, Xavier Blanc, Laurent Rioux, ...
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 1 months ago
Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Cu...
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, ...
PLDI
2010
ACM
15 years 6 days ago
DRFX: a simple and efficient memory model for concurrent programming languages
The most intuitive memory model for shared-memory multithreaded programming is sequential consistency (SC), but it disallows the use of many compiler and hardware optimizations th...
Daniel Marino, Abhayendra Singh, Todd D. Millstein...
ICCAD
2003
IEEE
145views Hardware» more  ICCAD 2003»
15 years 6 months ago
Manufacturing-Aware Physical Design
Ultra-deep submicron manufacturability impacts physical design (PD) through complex layout rules and large guardbands for process variability; this creates new requirements for ne...
Puneet Gupta, Andrew B. Kahng