Sciweavers

116 search results - page 19 / 24
» Model Synthesis from Imprecise Specifications
Sort
View
CODES
2006
IEEE
15 years 3 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
EVOW
2001
Springer
15 years 2 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
86
Voted
AAAI
2000
14 years 11 months ago
The Systems Engineering Process Activities (SEPA) Methodology and Tool Suite
or cone, abstraction is chosen to represent a spectrum of user inputs/requirements that are narrowed, refined, and structured into a system design. User inputs require refinement f...
K. Suzanne Barber, Thomas J. Graser, Paul Grisham,...
DAC
2006
ACM
15 years 10 months ago
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty
Existing approaches to timing analysis under uncertainty are based on restrictive assumptions. Statistical STA techniques assume that the full probabilistic distribution of parame...
Wei-Shen Wang, Vladik Kreinovich, Michael Orshansk...
SAC
2006
ACM
15 years 3 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...