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ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
15 years 8 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
WFLP
2000
Springer
124views Algorithms» more  WFLP 2000»
15 years 7 months ago
A Formal Approach to Reasoning about the Effectiveness of Partial Evaluation
We introduce a framework for assessing the effectiveness of partial evaluators in functional logic languages. Our framework is based on properties of the rewrite system that models...
Elvira Albert, Sergio Antoy, Germán Vidal
AMC
2007
125views more  AMC 2007»
15 years 4 months ago
Geometric multigrid for high-order regularizations of early vision problems
The surface estimation problem is used as a model to demonstrate a framework for solving early vision problems by high-order regularization with natural boundary conditions. Becaus...
Stephen L. Keeling, Gundolf Haase
ENTCS
2007
88views more  ENTCS 2007»
15 years 4 months ago
Keeping Secrets in Resource Aware Components
We present a powerful and flexible method for automatically checking the secrecy of values inside components. In our framework an attacker may monitor the external communication ...
Tom Chothia, Jun Pang, Muhammad Torabi Dashti
TCS
2008
15 years 4 months ago
Polyhedra genus theorem and Euler formula: A hypermap-formalized intuitionistic proof
This article presents formalized intuitionistic proofs for the polyhedra genus theorem, the Euler formula and a sufficient condition of planarity. They are based on a hypermap mod...
Jean-François Dufourd