Sciweavers

288 search results - page 14 / 58
» Model checking SystemC designs using timed automata
Sort
View
TCS
2010
14 years 7 months ago
Detecting synchronisation of biological oscillators by model checking
We define a subclass of timed automata, called oscillator timed automata, suitable to model biological oscillators. Coupled biological oscillators may synchronise, as emerging be...
Ezio Bartocci, Flavio Corradini, Emanuela Merelli,...
81
Voted
IEICET
2006
114views more  IEICET 2006»
14 years 9 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
FASE
2004
Springer
15 years 1 months ago
Specification and Analysis of Real-Time Systems Using Real-Time Maude
Real-Time Maude is a language and tool supporting the formal specification and analysis of real-time and hybrid systems. The specification formalism is based on rewriting logic, em...
Peter Csaba Ölveczky, José Meseguer
DFG
2004
Springer
15 years 1 months ago
Verification of PLC Programs Given as Sequential Function Charts
Programmable Logic Controllers (PLC) are widespread in the manufacturing and processing industries to realize sequential procedures and to avoid safety-critical states. For the spe...
Nanette Bauer, Sebastian Engell, Ralf Huuck, Sven ...
74
Voted
MEMOCODE
2006
IEEE
15 years 3 months ago
Specifying and proving properties of timed I/O automata in the TIOA toolkit
Timed I/O Automata (TIOA) is a mathematical framework for modeling and verification of distributed systems that involve discrete and continuous dynamics. TIOA can be used for exa...
Myla Archer, Hongping Lim, Nancy A. Lynch, Sayan M...