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115
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FMCAD
2004
Springer
15 years 7 months ago
A Simple Method for Parameterized Verification of Cache Coherence Protocols
Abstract. We present a simple method for verifying the safety properties of cache coherence protocols with arbitrarily many nodes. Our presentation begins with two examples. The fi...
Ching-Tsun Chou, Phanindra K. Mannava, Seungjoon P...
128
Voted
ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
15 years 7 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
109
Voted
ICSE
2000
IEEE-ACM
15 years 7 months ago
Verification of time partitioning in the DEOS scheduler kernel
This paper describes an experiment to use the Spin model checking system to support automated verification of time partitioning in the Honeywell DEOS real-time scheduling kernel. ...
John Penix, Willem Visser, Eric Engstrom, Aaron La...
198
Voted
CSCLP
2008
Springer
15 years 5 months ago
Challenges in Constraint-Based Analysis of Hybrid Systems
In the analysis of hybrid discrete-continuous systems, rich arithmetic constraint formulae with complex Boolean structure arise naturally. The iSAT algorithm, a solver for such for...
Andreas Eggers, Natalia Kalinnik, Stefan Kupfersch...
141
Voted
ATAL
2010
Springer
15 years 3 months ago
Verifying agents with memory is harder than it seemed
ATL+ is a variant of alternating-time temporal logic that does not have the expressive power of full ATL , but still allows for expressing some natural properties of agents. It ha...
Nils Bulling, Wojciech Jamroga