Abstract. This paper presents our experience implementing the memory management extensions in the Real-Time Specification for Java. These extensions are designed to given real-tim...
Of special interest in formal verification are safety properties, which assert that the system always stays within some allowed region. Each safety property can be associated with...
We describe an incomplete but sound and efficient livelock freedom test for infinite state asynchronous reactive systems. The method s a system into a set of simple control flow cy...
We propose a normalization technique for verifying arithmetic circuits in a bounded model checking environment. Our technique operates on the arithmetic bit level (ABL) descriptio...
We present a framework that combines ideas from spatial logics and Igarashi and Kobayashi's behavioural type systems, drawing benefits from both. In our approach, type systems...