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ICCD
2000
IEEE
69views Hardware» more  ICCD 2000»
15 years 9 months ago
Hierarchical Simulation of a Multiprocessor Architecture
When proposing new architectural enhancements, it is also important to account for the hardware complexity. To achieve this goal, we propose to model the new design in a hardware ...
Marius Pirvu, Laxmi N. Bhuyan, Rabi N. Mahapatra
ICA
2010
Springer
15 years 5 months ago
Probabilistic Latent Tensor Factorization
We develop a probabilistic modeling framework for multiway arrays. Our framework exploits the link between graphical models and tensor factorization models and it can realize any ...
Y. Kenan Yilmaz, A. Taylan Cemgil
ICS
2009
Tsinghua U.
15 years 11 months ago
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
Polychronis Xekalakis, Nikolas Ioannou, Marcelo Ci...
JETAI
1998
110views more  JETAI 1998»
15 years 4 months ago
Independency relationships and learning algorithms for singly connected networks
Graphical structures such as Bayesian networks or Markov networks are very useful tools for representing irrelevance or independency relationships, and they may be used to e cientl...
Luis M. de Campos
HPCC
2005
Springer
15 years 10 months ago
A Communication Broker for Nomadic Computing Systems
This paper presents the Esperanto Broker, a communication platform for nomadic computing applications. By using this broker, developers can model application components as a set of...
Domenico Cotroneo, Armando Migliaccio, Stefano Rus...