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QEST
2007
IEEE
16 years 1 months ago
Performance Trees: Expressiveness and Quantitative Semantics
—Performance Trees are a recently-proposed mechanism for the specification of performance properties and measures. They represent an attractive alternative to stochastic logics,...
Tamas Suto, Jeremy T. Bradley, William J. Knottenb...
SEW
2006
IEEE
16 years 1 months ago
Pseudo-Exhaustive Testing for Software
Pseudo-exhaustive testing uses the empirical observation that, for broad classes of software, a fault is likely triggered by only a few variables interacting. The method takes adv...
D. Richard Kuhn, Vadim Okun
TACAS
2005
Springer
124views Algorithms» more  TACAS 2005»
16 years 15 days ago
Dynamic Symmetry Reduction
Abstract. Symmetry reduction is a technique to combat the state explosion problem in temporal logic model checking. Its use with symbolic representation has suffered from the proh...
E. Allen Emerson, Thomas Wahl
CC
2001
Springer
146views System Software» more  CC 2001»
15 years 11 months ago
Alias Analysis by Means of a Model Checker
We study the application of a standard model checker tool, Spin, to the well-known problem of computing a may-alias relation for a C program. A precise may-alias relation can signi...
Vincenzo Martena, Pierluigi San Pietro
ISORC
1999
IEEE
15 years 11 months ago
v-Promela: A Visual, Object-Oriented Language for SPIN
We describe the design of VIP, a graphical front-end to the model checker SPIN. VIP supports a visual formalism, called v-Promela that connects the model checker to modern hierarc...
Stefan Leue, Gerard J. Holzmann