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» Model-Checking for Weighted Timed Automata
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101
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FUIN
2008
101views more  FUIN 2008»
15 years 14 days ago
Translation of Intermediate Language to Timed Automata with Discrete Data
The aim of this work is to describe the translation from Intermediate Language, one of the input formalisms of the model checking platform VerICS, to timed automata with discrete d...
Agata Janowska, Pawel Janowski, Dobieslaw Wr&oacut...
105
Voted
FUIN
2007
104views more  FUIN 2007»
15 years 10 days ago
SAT-Based Reachability Checking for Timed Automata with Discrete Data
Reachability analysis for timed automata using SAT-based methods was considered in many papers, occurring to be a very efficient model checking technique. In this paper we show ho...
Andrzej Zbrzezny, Agata Pólrola
CONCUR
2006
Springer
15 years 2 months ago
Model Checking Quantified Computation Tree Logic
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
Arend Rensink
FMICS
2010
Springer
15 years 1 months ago
Model Checking the FlexRay Physical Layer Protocol
Abstract. The FlexRay standard, developed by a cooperation of leading companies in the automotive industry, is a robust communication protocol for distributed components in modern ...
Michael Gerke 0002, Rüdiger Ehlers, Bernd Fin...
117
Voted
DAC
2008
ACM
16 years 1 months ago
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...
Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. R...