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FPL
2009
Springer
107views Hardware» more  FPL 2009»
15 years 7 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
PERVASIVE
2010
Springer
15 years 5 months ago
Specification and Verification of Complex Location Events with Panoramic
We present the design and evaluation of Panoramic, a tool that enables end-users to specify and verify an important family of complex location events. Our approach aims to reduce o...
Evan Welbourne, Magdalena Balazinska, Gaetano Borr...
POPL
2007
ACM
16 years 3 months ago
Conditional must not aliasing for static race detection
Race detection algorithms for multi-threaded programs using the common lock-based synchronization idiom must correlate locks with the memory locations they guard. The heart of a p...
Mayur Naik, Alex Aiken
ICSE
2004
IEEE-ACM
16 years 3 months ago
Heuristic-Based Model Refinement for FLAVERS
FLAVERS is a finite-state verification approach that allows an analyst to incrementally add constraints to improve the precision of the model of the system being analyzed. Except ...
Jianbin Tan, George S. Avrunin, Lori A. Clarke
PASTE
2004
ACM
15 years 8 months ago
Dynamically inferring temporal properties
Model checking requires a specification of the target system’s desirable properties, some of which are temporal. Formulating a property of the system based on either its abstrac...
Jinlin Yang, David Evans