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GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
15 years 10 months ago
Mixing ATPG and property checking for testing HW/SW interfaces
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
Alessandro Fin, Franco Fummi, Graziano Pravadelli
ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
15 years 9 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
FASE
2006
Springer
15 years 8 months ago
Formal Simulation and Analysis of the CASH Scheduling Algorithm in Real-Time Maude
This paper describes the application of the Real-Time Maude tool to the formal specification and analysis of the CASH scheduling algorithm and its suggested modifications. The CASH...
Peter Csaba Ölveczky, Marco Caccamo
140
Voted
FMSD
2006
131views more  FMSD 2006»
15 years 5 months ago
Specification and analysis of the AER/NCA active network protocol suite in Real-Time Maude
This paper describes the application of the Real-Time Maude tool and the Maude formal methodology to the specification and analysis of the AER/NCA suite of active network multicast...
Peter Csaba Ölveczky, José Meseguer, C...
163
Voted
SEKE
2010
Springer
15 years 2 months ago
Specification patterns can be formal and still easy
Abstract--Property specification is still one of the most challenging tasks for transference of software verification technology like model checking. The use of patterns has been p...
Fernando Asteasuain, Víctor A. Braberman