366 search results - page 29 / 74 » Model-checking higher-order functions |
FMCAD
2006
Springer
15 years 3 months ago
2006
Springer
In this paper we present a complete method for verifying properties expressed in the temporal logic CTL. In contrast to the majority of verification methods presented in recent yea...
ASPDAC
2007
ACM
15 years 3 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
APSEC
2005
IEEE
15 years 5 months ago
2005
IEEE
Embedded control programs are hard to analyse because their behaviour depends on how they interact with hardware devices. In particular, embedded code typically uses interrupts to...
TACAS
1997
Springer
15 years 3 months ago
1997
Springer
Abstract. We have argued previously that the e ectiveness of a veri cation system derives not only from the power of its individual features for expression and deduction, but from ...