168 search results - page 21 / 34 » Modeling Assembly Instruction Timing in Superscalar Architec... |
97
Voted
CP
2009
Springer
15 years 23 days ago
2009
Springer
Abstract. This paper considers the automatic generation of architectural tests (ATGP), a fundamental problem in processor validation. ATGPs are complex conditional constraint satis...
ISPASS
2005
IEEE
15 years 3 months ago
2005
IEEE
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
DSN
2005
IEEE
15 years 3 months ago
2005
IEEE
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
ET
2007
14 years 9 months ago
2007
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
117
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CC
2008
Springer
14 years 11 months ago
2008
Springer
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...