168 search results - page 25 / 34 » Modeling Assembly Instruction Timing in Superscalar Architec... |
JSA
2000
14 years 9 months ago
2000
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
RTAS
2005
IEEE
15 years 3 months ago
2005
IEEE
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
CF
2004
ACM
15 years 2 months ago
2004
ACM
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
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Voted
CP
2007
Springer
15 years 3 months ago
2007
Springer
Visualization is often invaluable to understand the behavior of optimization algorithms, identify their bottlenecks or pathological behaviors, and suggest remedial techniques. Yet ...
ISPDC
2005
IEEE
15 years 3 months ago
2005
IEEE
Abstract. Grid architectures are execution environments that are known to be at the same time distributed, parallel, heterogeneous and dynamic. While current tools focus solutions ...