168 search results - page 6 / 34 » Modeling Assembly Instruction Timing in Superscalar Architec... |
106
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ASAP
2004
IEEE
15 years 1 months ago
2004
IEEE
Binary finite fields GF(2n ) are very commonly used in cryptography, particularly in publickey algorithms such as Elliptic Curve Cryptography (ECC). On word-oriented programmable ...
CF
2005
ACM
14 years 11 months ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
FAC
2000
14 years 9 months ago
2000
In this paper we present a method of describing microprocessors at different levels of temporal and data abstraction. We consider microprogrammed, pipelined and superscalar proces...
102
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CGO
2003
IEEE
15 years 2 months ago
2003
IEEE
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
94
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CF
2010
ACM
15 years 2 months ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...