168 search results - page 9 / 34 » Modeling Assembly Instruction Timing in Superscalar Architec... |
ASPLOS
2006
ACM
15 years 3 months ago
2006
ACM
Cycles per Instruction (CPI) stacks break down processor execution time into a baseline CPI plus a number of miss event CPI components. CPI breakdowns can be very helpful in gaini...
ITCC
2005
IEEE
15 years 3 months ago
2005
IEEE
1 Table lookups are one of the most frequently-used operations in symmetric-key ciphers. Particularly in the newer algorithms such as the Advanced Encryption Standard (AES), we fr...
116
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ENTCS
2008
14 years 9 months ago
2008
The accurate measurement of the execution time of Java bytecode is one factor that is important in order to estimate the total execution time of a Java application running on a Ja...
90
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DATE
2007
IEEE
15 years 3 months ago
2007
IEEE
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
77
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ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...