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DATE
2000
IEEE
140views Hardware» more  DATE 2000»
15 years 8 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...
ICCAD
2000
IEEE
73views Hardware» more  ICCAD 2000»
15 years 8 months ago
Simulation and Optimization of the Power Distribution Network in VLSI Circuits
In this paper, we present simulation techniques to estimate the worst-case voltage variation using a RC model for the power distribution network. Pattern independent maximum envel...
Geng Bai, Sudhakar Bobba, Ibrahim N. Hajj
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
15 years 8 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
ICIP
2000
IEEE
15 years 8 months ago
Visual Optimization Tools in JPEG 2000
The human visual system plays a key role in the final perceived quality of the compressed images. It is therefore desirable to allow system designers and users to take advantage o...
Wenjun Zeng, Scott Daly, Shawmin Lei
ICPPW
2000
IEEE
15 years 8 months ago
Reducing Web Latency with Hierarchical Cache-Based Prefetching
Proxy caches have become a central mechanism for reducing the latency of web document retrieval. While caching alone reduces latency for previously requested documents, web docume...
Dan Foygel, Dennis Strelow
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