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GLVLSI
2007
IEEE
173views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Modeling and estimating leakage current in series-parallel CMOS networks
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
Paulo F. Butzen, André Inácio Reis, ...
BMCBI
2008
114views more  BMCBI 2008»
15 years 4 months ago
WSPMaker: a web tool for calculating selection pressure in proteins and domains using window-sliding
Background: In the study of adaptive evolution, it is important to detect the protein coding sites where natural selection is acting. In general, the ratio of the rate of non-syno...
Yong Seok Lee, Tae-Hyung Kim, Tae-Wook Kang, Won-H...
ICCAD
1992
IEEE
93views Hardware» more  ICCAD 1992»
15 years 8 months ago
Timing analysis in high-level synthesis
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
TMC
2011
164views more  TMC 2011»
14 years 11 months ago
Security Games for Vehicular Networks
—Vehicular networks (VANETs) can be used to improve transportation security, reliability, and management. This paper investigates security aspects of VANETs within a game-theoret...
Tansu Alpcan, Sonja Buchegger
POPL
2006
ACM
16 years 4 months ago
Engineering with logic: HOL specification and symbolic-evaluation testing for TCP implementations
The TCP/IP protocols and Sockets API underlie much of modern computation, but their semantics have historically been very complex and ill-defined. The real standard is the de fact...
Steve Bishop, Matthew Fairbairn, Michael Norrish, ...