221 search results - page 4 / 45 » Modeling Interconnect Variability Using Efficient Parametric... |
DAC
1998
ACM
15 years 10 months ago
1998
ACM
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
In this paper we describe a flexible and efficient new algorithm for model order reduction of parameterized systems. The method is based on the reformulation of the parametric s...
ISQED
2007
IEEE
15 years 3 months ago
2007
IEEE
Model order reduction plays a key role in determining VLSI system performance and the optimization of interconnects. In this paper, we develop an accurate and provably passive met...
DAC
2000
ACM
15 years 1 months ago
2000
ACM
Signal integrity analysis has become imperative for high-speed designs. In this paper, we present a new technique to advance Krylov-space based passive model-reduction algorithms ...
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...