Sciweavers

2805 search results - page 481 / 561
» Modeling Memory for Melodies
Sort
View
IPPS
2000
IEEE
15 years 2 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
ISPAN
2000
IEEE
15 years 2 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
CAV
2000
Springer
97views Hardware» more  CAV 2000»
15 years 2 months ago
Detecting Errors Before Reaching Them
Abstract. Any formalmethodor tool is almostcertainlymoreoftenapplied in situationswheretheoutcomeis failure(acounterexample)rather than success (a correctness proof). We present a ...
Luca de Alfaro, Thomas A. Henzinger, Freddy Y. C. ...
HCW
1999
IEEE
15 years 2 months ago
A Unified Resource Scheduling Framework for Heterogeneous Computing Environments
A major challenge in Metacomputing Systems (Computational Grids) is to effectively use their shared resources, such as compute cycles, memory, communication network, and data repo...
Ammar H. Alhusaini, Viktor K. Prasanna, Cauligi S....
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 2 months ago
Power minimization using system-level partitioning of applications with quality of service requirements
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
Gang Qu, Miodrag Potkonjak