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IEEEPACT
2009
IEEE
15 years 4 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
EAGC
2004
Springer
16 years 3 days ago
Monitoring Message-Passing Parallel Applications in the Grid with GRM and Mercury Monitor
Application monitoring in the grid for parallel applications is hardly supported in recent grid infrastructures. There is a need to visualize the behavior of the program during its...
Norbert Podhorszki, Zoltán Balaton, Gabor G...
CPHYSICS
2007
80views more  CPHYSICS 2007»
15 years 6 months ago
Development of a parallelized 3D electrostatic PIC-FEM code and its applications
A parallelized three-dimensional self-consistent electrostatic particle-in-cell (PIC) code using unstructured tetrahedral mesh is proposed. Parallel implementation of the current ...
J.-S. Wu, K.-H. Hsu, F.-L. Li, C.-T. Hung, S.-Y. J...
SC
1992
ACM
15 years 10 months ago
Compiler Code Transformations for Superscalar-Based High Performance Systems
Exploiting parallelism at both the multiprocessor level and the instruction level is an e ective means for supercomputers to achieve high-performance. The amount of instruction-le...
Scott A. Mahlke, William Y. Chen, John C. Gyllenha...
182
Voted
DSD
2006
IEEE
131views Hardware» more  DSD 2006»
15 years 10 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn