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PPL
2008
185views more  PPL 2008»
15 years 4 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
CCGRID
2006
IEEE
15 years 10 months ago
Network Bandwidth Predictor (NBP): A System for Online Network performance Forecasting
The applicability of network-based computing depends on the availability of the underlying network bandwidth. However, network resources are shared and the available network bandw...
Alaknantha Eswaradass, Xian-He Sun, Ming Wu
HPCA
2005
IEEE
16 years 5 months ago
A Performance Comparison of DRAM Memory System Optimizations for SMT Processors
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
Zhichun Zhu, Zhao Zhang
CPE
1994
Springer
170views Hardware» more  CPE 1994»
15 years 8 months ago
Automatic Scalability Analysis of Parallel Programs Based on Modeling Techniques
When implementingparallel programs forparallel computer systems the performancescalability of these programs should be tested and analyzed on different computer configurations and...
Allen D. Malony, Vassilis Mertsiotakis, Andreas Qu...
ISPAN
2005
IEEE
15 years 10 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg