The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
We present a system for rendering planar rigid-body motion by means of a redundant parallel mechanism. The device design, the control architecture and the passive virtual environm...
Daniela Constantinescu, Icarus Chau, Simon P. DiMa...
Abstract. Multiphysics and multiscale simulation systems are emerging as a new grand challenge in computational science, largely because of increased computing power provided by th...
Everest T. Ong, Jay Walter Larson, Boyana Norris, ...
A new methodology is presented in this paper for resource management in a metacomputing environment using a hierarchy of homogeneous agents that has the capability of service disco...
Abstract. A fault tolerant parallel virtual file system is designed and implemented to provide high I/O performance and high reliability. A queuing model is used to analyze in deta...