In this paper, we present a high fidelity and efficient emulation framework called TWINE, which combines the accuracy and realism of emulated and physical networks and the scala...
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Advances in internetworking technology and the decreasing cost-performance ratio of commodity computing components have enabled Volunteer Computing (VC). VC platforms aggregate te...
Bruno Donassolo, Henri Casanova, Arnaud Legrand, P...
Combining ideas from several previous proposals, such as Active Pages, DIVA, and ULMT, we present the Memory Arithmetic Unit and Interface (MAUI) architecture. Because the “inte...
Justin Teller, Charles B. Silio Jr., Bruce L. Jaco...
Many important parallel applications require multiple flows of control to run on a single processor. In this paper, we present a study of four flow-of-control mechanisms: proces...