6862 search results - page 406 / 1373 » Modeling Parallel Applications Performance on Heterogeneous ... |
121
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ISCA
1997
IEEE
15 years 10 months ago
1997
IEEE
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
134
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IPPS
2008
IEEE
16 years 18 days ago
2008
IEEE
Evaluation of high performance parallel systems is a delicate issue, due to the difficulty of generating workloads that represent, with fidelity, those that will run on actual sys...
156
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IPPS
2008
IEEE
16 years 18 days ago
2008
IEEE
This paper describes our early experiences with a preproduction Cray XMT system that implements a scalable shared memory architecture with hardware support for multithreading. Unl...
145
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DATE
2008
IEEE
16 years 20 days ago
2008
IEEE
Embedded systems are often operating under hard real-time constraints. Such systems are naturally described as time-bound reactions to external events, a point of view made manife...
166
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ICS
2007
Tsinghua U.
16 years 10 days ago
2007
Tsinghua U.
This paper explores the scalability of the Stream Processor architecture along the instruction-, data-, and thread-level parallelism dimensions. We develop detailed VLSI-cost and ...