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ICCAD
1994
IEEE
104views Hardware» more  ICCAD 1994»
15 years 8 months ago
Module selection and data format conversion for cost-optimal DSP synthesis
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
ICRA
1993
IEEE
131views Robotics» more  ICRA 1993»
15 years 8 months ago
Exploration Strategies for Mobile Robots
The problem of programming a robot t o carry out a systematic exploration of its environment using realistic sensors is considered in this paper. The robot is modelled as a single...
Camillo J. Taylor, David J. Kriegman
ISCA
1993
IEEE
153views Hardware» more  ISCA 1993»
15 years 8 months ago
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
Per Stenström, Mats Brorsson, Lars Sandberg
LICS
1994
IEEE
15 years 8 months ago
A Fully Abstract Semantics for Concurrent Graph Reduction
abstract semantics for concurrent graph reduction ALAN JEFFREY This paper presents a fully abstract semantics for a variant of the untyped -calculus with recursive declarations. We...
Alan Jeffrey
LICS
1994
IEEE
15 years 8 months ago
Subtyping and Parametricity
In this paper we study the interaction of subtyping and parametricity. We describe a logic for a programming language with parametric polymorphism and subtyping. The logic support...
Gordon D. Plotkin, Martín Abadi, Luca Carde...
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