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ARCS
2009
Springer
15 years 9 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
15 years 9 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
132
Voted
ISPASS
2007
IEEE
15 years 9 months ago
Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance
The ongoing trend of increasing computer hardware and software complexity has resulted in the increase in complexity and overheads of cycle-accurate processor system simulation, e...
Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer...
145
Voted
RTCSA
2007
IEEE
15 years 9 months ago
A Continuous Query Index for Processing Queries on RFID Data Stream
RFID middleware systems collect and filter RFID streaming data gathered continuously by numerous readers to process requests from applications. These requests are called continuou...
Jaekwan Park, Bonghee Hong, ChaeHoon Ban
TPHOL
2007
IEEE
15 years 9 months ago
Using XCAP to Certify Realistic Systems Code: Machine Context Management
Formal, modular, and mechanized verification of realistic systems code is desirable but challenging. Verification of machine context management (a basis of multi-tasking) is one ...
Zhaozhong Ni, Dachuan Yu, Zhong Shao
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