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DAC
2002
ACM
15 years 10 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
DAC
2002
ACM
15 years 10 months ago
Component-based design approach for multicore SoCs
This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitive...
Ahmed Amine Jerraya, Amer Baghdadi, Damien Lyonnar...
DAC
2004
ACM
15 years 10 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
DAC
2006
ACM
15 years 10 months ago
HybDTM: a coordinated hardware-software approach for dynamic thermal management
With ever-increasing power density and cooling costs in modern high-performance systems, dynamic thermal management (DTM) has emerged as an effective technique for guaranteeing th...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
ICML
1999
IEEE
15 years 10 months ago
Least-Squares Temporal Difference Learning
Excerpted from: Boyan, Justin. Learning Evaluation Functions for Global Optimization. Ph.D. thesis, Carnegie Mellon University, August 1998. (Available as Technical Report CMU-CS-...
Justin A. Boyan
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