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FOSSACS
2001
Springer
15 years 11 months ago
On Regular Message Sequence Chart Languages and Relationships to Mazurkiewicz Trace Theory
Hierarchical Message Sequence Charts are a well-established formalism to specify telecommunication protocols. In this model, numerous undecidability results were obtained recently ...
Rémi Morin
UIST
1993
ACM
15 years 10 months ago
VB2: An Architecture for Interaction in Synthetic Worlds
This paper describes the VB2 architecture for the construction of three-dimensional interactive applications. The system's state and behavior are uniformly represented as a n...
Enrico Gobbetti, Jean-Francis Balaguer, Daniel Tha...
CASES
2007
ACM
15 years 10 months ago
Performance optimal processor throttling under thermal constraints
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
Ravishankar Rao, Sarma B. K. Vrudhula
CASES
2007
ACM
15 years 10 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
CODES
2007
IEEE
15 years 10 months ago
A computational reflection mechanism to support platform debugging in SystemC
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
Bruno Albertini, Sandro Rigo, Guido Araujo, Cristi...
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