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146
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VLSISP
2011
216views Database» more  VLSISP 2011»
14 years 10 months ago
Accurate Area, Time and Power Models for FPGA-Based Implementations
This paper presents accurate area, time, power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family [1]. These models are designed to facilitate ef...
Lanping Deng, Kanwaldeep Sobti, Yuanrui Zhang, Cha...
110
Voted
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
16 years 17 days ago
An Accurate Combinatorial Model for Performance Prediction of Deterministic Wormhole Routing in Torus Multicomputer Systems
Although several analytical models have been proposed in the literature for different interconnection networks with deterministic routing, very few of them have considered the eff...
Hashem Hashemi Najaf-abadi, Hamid Sarbazi-Azad
117
Voted
ICCS
2001
Springer
15 years 8 months ago
On the Effectiveness of D-BSP as a Bridging Model of Parallel Computation
This paper surveys and places into perspective a number of results concerning the D-BSP (Decomposable Bulk Synchronous Parallel) model of computation, a variant of the popular BSP ...
Gianfranco Bilardi, Carlo Fantozzi, Andrea Pietrac...
TJS
2008
95views more  TJS 2008»
15 years 3 months ago
Combating I-O bottleneck using prefetching: model, algorithms, and ramifications
Multiple memory models have been proposed to capture the effects of memory hierarchy culminating in the I-O model of Aggarwal and Vitter [?]. More than a decade of architectural a...
Akshat Verma, Sandeep Sen
119
Voted
ICPR
2008
IEEE
15 years 10 months ago
Back to the future: Robust foreground extraction with reversed-time background modeling
“Ghosts” arise in traditional background subtraction when an object starts to move, causing the exposed background to be labelled as a ghost foreground. With background model ...
Akhilesh Kumar Sinha, Prithwijit Guha, Amitabha Mu...