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CJ
2006
84views more  CJ 2006»
14 years 10 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
IEEECIT
2010
IEEE
14 years 8 months ago
Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems
—As the need for embedded systems to interact with other systems is growing fast, we see great opportunities in introducing the hardware-in-the-loop technique to the field of ha...
Dogan Fennibay, Arda Yurdakul, Alper Sen
MOBICOM
2004
ACM
15 years 3 months ago
Denial of service resilience in ad hoc networks
Significant progress has been made towards making ad hoc networks secure and DoS resilient. However, little attention has been focused on quantifying DoS resilience: Do ad hoc ne...
Imad Aad, Jean-Pierre Hubaux, Edward W. Knightly
DASFAA
2007
IEEE
195views Database» more  DASFAA 2007»
15 years 4 months ago
Quality Aware Privacy Protection for Location-Based Services
Protection of users’ privacy has been a central issue for location-based services (LBSs). In this paper, we classify two kinds of privacy protection requirements in LBS: location...
Zhen Xiao, Xiaofeng Meng, Jianliang Xu
MSWIM
2004
ACM
15 years 3 months ago
Consistency challenges of service discovery in mobile ad hoc networks
Emerging “urban” ad hoc networks resulting from a large number of individual WLAN users challenge the way users could explore and interact with their physical surroundings. Ro...
Christian Frank, Holger Karl