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CAAN
2004
Springer
15 years 9 months ago
Congestion Games, Load Balancing, and Price of Anarchy
Imagine a set of self-interested clients, each of whom must choose a server from a permissible set. A server’s latency is inversely proportional to its speed, but it grows linear...
Anshul Kothari, Subhash Suri, Csaba D. Tóth...
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
15 years 7 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
NETWORKS
2008
15 years 3 months ago
Price competition with elastic traffic
In this paper, we present a combined study of price competition and traffic control in a congested network. We study a model in which service providers own the routes in a network...
Asuman E. Ozdaglar
FPL
2010
Springer
168views Hardware» more  FPL 2010»
15 years 1 months ago
Pipelined FPGA Adders
Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. Thi...
Florent de Dinechin, Hong Diep Nguyen, Bogdan Pasc...
SPAA
1990
ACM
15 years 7 months ago
Analysis of Multithreaded Architectures for Parallel Computing
Multithreading has been proposed as an architectural strategy for tolerating latency in multiprocessors and, through limited empirical studies, shown to offer promise. This paper ...
Rafael H. Saavedra-Barrera, David E. Culler, Thors...