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EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
15 years 5 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
ICFEM
2010
Springer
15 years 2 days ago
A Semantic Model for Service Composition with Coordination Time Delays
The correct behavior of a service composition depends on the appropriate coordination of its services. According to the idea of channelbased coordination, services exchange message...
Natallia Kokash, Behnaz Changizi, Farhad Arbab
CONCURRENCY
1998
130views more  CONCURRENCY 1998»
15 years 1 months ago
JPVM: network parallel computing in Java
The JPVM library is a software system for explicit message-passing based distributed memory MIMD parallel programming in Java. The library supports an interface similar to the C a...
Adam Ferrari
LCTRTS
2000
Springer
15 years 5 months ago
Approximation of Worst-Case Execution Time for Preemptive Multitasking Systems
The control system of many complex mechatronic products requires for each task the Worst Case Execution Time (WCET), which is needed for the scheduler's admission tests and su...
Matteo Corti, Roberto Brega, Thomas R. Gross
ECRTS
2003
IEEE
15 years 6 months ago
Establishing Timing Requirements and Control Attributes for Control Loops in Real-Time Systems
Advances in scheduling theory have given designers of control systems greater flexibility over their choice of timing requirements. This could lead to systems becoming more respon...
Iain Bate, Peter Nightingale, Anton Cervin