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» Modeling Timed Concurrent Systems
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EURODAC
1994
IEEE
130views VHDL» more  EURODAC 1994»
15 years 5 months ago
Modeling shared variables in VHDL
A set of concurrent processes communicating through shared variables is an often used model for hardware systems. This paper presents three modeling techniques for representing su...
Jan Madsen, Jens P. Brage
INFOCOM
2010
IEEE
14 years 12 months ago
Throughput Analysis of Multiple Access Relay Channel under Collision Model
—Despite much research on the throughput of relaying networks under idealized interference models, many practical wireless networks rely on physical-layer protocols that preclude...
Seyed A. Hejazi, Ben Liang
ICST
2008
IEEE
15 years 7 months ago
Verifying and Analyzing Adaptive Logic through UML State Models
It is becoming increasingly important to be able to adapt an application’s behavior at run time in response to changing requirements and environmental conditions. Adaptive progr...
Andres J. Ramirez, Betty H. C. Cheng
PADS
1999
ACM
15 years 5 months ago
Shock Resistant Time Warp
In an attempt to cope with time-varying workload, traditional adaptive Time Warp protocols are designed to react in response to performance changes by altering control parameter c...
Alois Ferscha, James Johnson
ACSD
2009
IEEE
87views Hardware» more  ACSD 2009»
15 years 5 months ago
Saving Space in a Time Efficient Simulation Algorithm
A number of algorithms are available for computing the simulation relation on Kripke structures and on labelled transition systems representing concurrent systems. Among them, the...
Silvia Crafa, Francesco Ranzato, Francesco Tapparo