3565 search results - page 590 / 713 » Modeling a system controller for timing analysis |
177
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SIGMETRICS
1996
ACM
15 years 8 months ago
1996
ACM
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
117
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ELPUB
1998
ACM
15 years 8 months ago
1998
ACM
The content and structure of an electronically published document can be authored and processed in ways that allow for flexibility in presentation on different environments for di...
145
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INFOCOM
2010
IEEE
15 years 2 months ago
2010
IEEE
—Malware attacks constitute a serious security risk that threatens to slow down the large scale proliferation of wireless applications. As a first step towards thwarting this se...
120
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CSFW
2009
IEEE
15 years 10 months ago
2009
IEEE
—As networked systems grow in complexity, they are increasingly vulnerable to denial-of-service (DoS) attacks involving resource exhaustion. A single malicious input of coma can ...
143
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HPCA
2006
IEEE
16 years 4 months ago
2006
IEEE
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...