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ICCAD
2001
IEEE
107views Hardware» more  ICCAD 2001»
15 years 10 months ago
A Convex Programming Approach to Positive Real Rational Approximation
As system integration evolves and tighter design constraints must be met, it becomes necessary to account for the non-ideal behavior of all the elements in a system. Certain devic...
Carlos P. Coelho, Joel R. Phillips, Luis Miguel Si...
ICCAD
2000
IEEE
138views Hardware» more  ICCAD 2000»
15 years 5 months ago
Fast Analysis and Optimization of Power/Ground Networks
This paper presents an efficient method for optimizing power/ground (P/G) networks by widening wires and adding decoupling capacitors (decaps). It proposes a structured skeleton t...
Haihua Su, Kaushik Gala, Sachin S. Sapatnekar
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
15 years 10 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
15 years 5 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
ICCAD
2005
IEEE
133views Hardware» more  ICCAD 2005»
15 years 10 months ago
Gate sizing using incremental parameterized statistical timing analysis
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...
Matthew R. Guthaus, Natesan Venkateswaran, Chandu ...