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ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
15 years 10 months ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
ICCAD
2001
IEEE
127views Hardware» more  ICCAD 2001»
15 years 10 months ago
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...
Gang Qu
ICCAD
2007
IEEE
98views Hardware» more  ICCAD 2007»
15 years 10 months ago
Device-circuit co-optimization for mixed-mode circuit design via geometric programming
Modern processing technologies offer a number of types of devices such as high-VT , low-VT , thick-oxide, etc. in addition to the nominal transistor in order to meet system perfor...
Jintae Kim, Ritesh Jhaveri, Jason Woo, Chih-Kong K...
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
15 years 10 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
15 years 5 months ago
Fast performance analysis of bus-based system-on-chip communication architectures
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
Kanishka Lahiri, Anand Raghunathan, Sujit Dey