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ICCAD
2001
IEEE
102views Hardware» more  ICCAD 2001»
15 years 10 months ago
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing
This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enabl...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
15 years 10 months ago
A unified non-rectangular device and circuit simulation model for timing and power
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
Sean X. Shi, Peng Yu, David Z. Pan
ICCAD
2001
IEEE
104views Hardware» more  ICCAD 2001»
15 years 10 months ago
A Symbolic Simulation-Based Methodology for Generating Black-Box Timing Models of Custom Macrocells
We present a methodology for generating black-box timing models for full-custom transistor-level CMOS circuits. Our approach utilizes transistor-level ternary symbolic timing simu...
Clayton B. McDonald, Randal E. Bryant
ICCAD
1996
IEEE
106views Hardware» more  ICCAD 1996»
15 years 5 months ago
A general dispersive multiconductor transmission line model for interconnect simulation in SPICE
Although numerous methods have been proposed for interconnect simulation, no single model exists for all kind of transmission line problems. This paper presents a new, single, gen...
Mustafa Celik, Andreas C. Cangellaris
ICCAD
2003
IEEE
204views Hardware» more  ICCAD 2003»
15 years 10 months ago
Modeling of Ballistic Carbon Nanotube Field Effect Transistors for Efficient Circuit Simulation
Carbon Nanotube Field-Effect Transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators ...
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik ...