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IJNS
2000
130views more  IJNS 2000»
15 years 3 months ago
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems
An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach ...
Teresa Serrano-Gotarredona, Andreas G. Andreou, Be...
154
Voted
JUCS
2000
120views more  JUCS 2000»
15 years 3 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
15 years 2 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
TON
2010
129views more  TON 2010»
15 years 2 months ago
QoS-based manycasting over optical burst-switched (OBS) networks
Abstract—Many distributed applications require a group of destinations to be coordinated with a single source. Multicasting is a communication paradigm to implement these distrib...
Balagangadhar G. Bathula, Vinod Vokkarane
MOBIHOC
2010
ACM
15 years 1 months ago
Near optimal multi-application allocation in shared sensor networks
Recent years have witnessed the emergence of shared sensor networks as integrated infrastructure for multiple applications. It is important to allocate multiple applications in a ...
You Xu, Abusayeed Saifullah, Yixin Chen, Chenyang ...
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