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ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
15 years 10 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
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ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
15 years 10 months ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
15 years 10 months ago
A new statistical max operation for propagating skewness in statistical timing analysis
Statistical static timing analysis (SSTA) is emerging as a solution for predicting the timing characteristics of digital circuits under process variability. For computing the stat...
Kaviraj Chopra, Bo Zhai, David Blaauw, Dennis Sylv...
ICCAD
2005
IEEE
117views Hardware» more  ICCAD 2005»
15 years 10 months ago
IMF: interconnect-driven multilevel floorplanning for large-scale building-module designs
Abstract— We present in this paper a new interconnect-driven multilevel floorplanning, called IMF, to handle large-scale building-module designs. Unlike the traditional multilev...
Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 5 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah