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ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
15 years 9 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...
MMSEC
2006
ACM
129views Multimedia» more  MMSEC 2006»
15 years 9 months ago
Digital invisible ink and its applications in steganography
A novel information-hiding methodology denoted as digital invisible ink is introduced. The proposed approach is inspired by the invisible ink in the real world and can be regarded...
Chun-Hsiang Huang, Shang-Chih Chuang, Ja-Ling Wu
SIGCSE
2005
ACM
179views Education» more  SIGCSE 2005»
15 years 9 months ago
Design patterns for database pedagogy: a proposal
Courses in Relational Databases largely use a domain-specific design approach different from that used in the rest of the curriculum. Use of the Unified Process, UML, and Design P...
Thomas J. Marlowe, Cyril S. Ku, James W. Benham
CODES
2000
IEEE
15 years 8 months ago
Frequency interleaving as a codesign scheduling paradigm
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and software behaviors so that software models with conceptually unbounded state and ...
JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas
GPCE
2004
Springer
15 years 9 months ago
Compiling Process Graphs into Executable Code
Abstract. Model-driven architecture envisions a paradigm shift as dramatic as the one from low-level assembler languages to high-level programming languages. In order for this visi...
Rainer Hauser, Jana Koehler