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84
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WWW
2008
ACM
16 years 4 months ago
Compoweb: a component-oriented web architecture
In this paper, client-site Web mashups are studied from component-oriented perspective, and CompoWeb, a componentoriented Web architecture, is proposed. In CompoWeb, a Web applica...
Rui Guo, Bin B. Zhu, Min Feng 0002, Aimin Pan, Bos...
ASPLOS
2009
ACM
16 years 4 months ago
Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
Robert D. Cameron, Dan Lin
158
Voted
EMSOFT
2007
Springer
15 years 10 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...
123
Voted
DAC
2003
ACM
16 years 4 months ago
Using a formal specification and a model checker to monitor and direct simulation
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
Serdar Tasiran, Yuan Yu, Brannon Batson
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
15 years 9 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...