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GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
15 years 1 months ago
Spatial and temporal design debug using partial MaxSAT
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
Yibin Chen, Sean Safarpour, Andreas G. Veneris, Jo...
CODES
2004
IEEE
15 years 1 months ago
CPU scheduling for statistically-assured real-time performance and improved energy efficiency
We present a CPU scheduling algorithm, called Energy-efficient Utility Accrual Algorithm (or EUA), for battery-powered, embedded real-time systems. We consider an embedded softwar...
Haisang Wu, Binoy Ravindran, E. Douglas Jensen, Pe...
ECCV
2006
Springer
15 years 1 months ago
Using a Connected Filter for Structure Estimation in Perspective Systems
Three-dimensional structure information can be estimated from two-dimensional images using recursive estimation methods. This paper investigates possibilities to improve structure...
Fredrik Nyberg, Ola Dahl, Jan Holst, Anders Heyden
ECAL
1995
Springer
15 years 1 months ago
Evolving Artificial Neural Networks that Develop in Time
Although recently there has been an increasing interest in studing genetically-based development using Artificial Life models, the mapping of the genetic information into the phen...
Stefano Nolfi, Domenico Parisi
ICCAD
1995
IEEE
180views Hardware» more  ICCAD 1995»
15 years 1 months ago
Design based analog testing by Characteristic Observation Inference
In this paper, a new approach to analog test design based on the circuit design process, called Characteristic Observation Inference (COI), is presented. In many situations, it is...
Walter M. Lindermeir, Helmut E. Graeb, Kurt Antrei...