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104
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EIT
2009
IEEE
15 years 7 months ago
System-level memory modeling for bus-based memory architecture exploration
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...
Zhongbo Cao, Ramon Mercado, Diane T. Rover
99
Voted
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
16 years 27 days ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
VAMOS
2007
Springer
15 years 6 months ago
KumbangSec: An Approach for Modelling Functional and Security Variability in Software Architectures
Software products often need to vary in terms of functionality, but also in terms of quality attributes. We describe KumbangSec, which in an approach for modelling functional and ...
Varvana Myllärniemi, Mikko Raatikainen, Tomi ...
105
Voted
IHIS
2005
ACM
15 years 6 months ago
An architecture for the interoperability of workflow models
The goal of this work is to contribute to the field of interoperability of Workflow models. To achieve this interoperability, we have built a generic architecture that s three lev...
Salah Hamri, Mahmoud Boufaïda, Nacer Boudjlid...
96
Voted
NPC
2005
Springer
15 years 6 months ago
Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...