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96
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APCSAC
2001
IEEE
15 years 4 months ago
Retargetable Cache Simulation Using High Level Processor Models
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
Rajiv A. Ravindran, Rajat Moona
ANSOFT
1998
140views more  ANSOFT 1998»
15 years 14 days ago
FORM: A Feature-Oriented Reuse Method with Domain-Specific Reference Architectures
Systematic discovery and exploitation of commonality across related software systems is a fundamental technical requirement for achieving successful software reuse. By examining a...
Kyo Chul Kang, Sajoong Kim, Jaejoon Lee, Kijoo Kim...
ICAS
2009
IEEE
125views Robotics» more  ICAS 2009»
15 years 7 months ago
Tools for Architecture Based Autonomic Systems
Recent years have seen a growing interest in autonomic computing, an approach to providing systems with self managing properties [1]. Autonomic computing aims to address the incre...
Noel De Palma, Konstantin Popov, Nikos Parlavantza...
97
Voted
IPPS
1998
IEEE
15 years 5 months ago
Using the BSP Cost Model to Optimise Parallel Neural Network Training
We derive cost formulae for three di erent parallelisation techniques for training supervised networks. These formulae are parameterised by properties of the target computer archit...
R. O. Rogers, David B. Skillicorn
105
Voted
ACSAC
2002
IEEE
15 years 5 months ago
A Context-Aware Security Architecture for Emerging Applications
We describe an approach to building security services for context-aware environments. Specifically, we focus on the design of security services that incorporate the use of securi...
Michael J. Covington, Prahlad Fogla, Zhiyuan Zhan,...