We present an approach for the supervised online learning of object representations based on a biologically motivated architecture of visual processing. We use the output of a rece...
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
In this paper, we present a web-based architecture of a spatiotemporal video data management system, which can accommodate a wide range of activities by various types of users. Be...
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
Integrating a system of disparate components to form a single application is still a daunting, high risk task, especially for components with heterogeneous communication expectati...
Michelle Hepner, Rose F. Gamble, Manasi Kelkar, Le...